1. Technical Field
The present invention relates generally to power management of electronic devices, and more particularly to providing power savings for multi-threaded processors.
2. Background
Electronic devices are ubiquitous in society and can be found in everything from wristwatches to computers. The complexity and sophistication of these electronic devices usually increases with each generation. For example, newer microprocessors often have higher operating frequencies than previous generations of microprocessors. As a result of the increased operating frequencies, newer generations of microprocessors may consume more power than previous generations of microprocessors.
In addition to the increased operating frequency potentially causing increased power consumption, this increased operating frequency also may cause a growing disparity between the speed that a computer's microprocessor operates at versus the computer's memory access speed. Because of this disparity, computers with high speed microprocessors may spend a large amount of time waiting for memory references to complete instead of performing computational operations. Some microprocessors may attempt to execute multiple threads of program code concurrently to offset this downtime. Notwithstanding the increase in throughput of the program code that comes with multi-threading, there still remains a need for providing methods and apparatuses that conserve power in multi-threaded processors.